Principal Design Engineer

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. What’s Encouraged Daily: AI-First Engineering: Deploy AI tools (LLMs, code/RTL generation, spec parsing, waveform interpretation, layout engines) as default practice. Continuously identify automation opportunities and rearchitect workflows—specs, simulations, reviews, hand-offs—to be AI-consumable. Build prompt libraries, agents, and scripts that eliminate recurring manual patterns! AI Leadership: Champion AI adoption by evaluating emerging tools, running pilots, and publishing standard methodologies that measurably reduce cycle time or prove quality! Technical Ownership: Design and verify major IO/datapath blocks (receivers, serializer, clock distribution, equalizers, ZQ calibration, ONFI training, wave pipelines) to meet performance specs, using AI to accelerate exploration, sizing, and verification. Multi-functional Collaboration: Work with integration, design, and Apps teams to define interfaces and evaluate new specifications. Use AI to summarize discussions, reconcile specs, and quantify trade-offs. Mentorship: Document AI-augmented methodologies and teach engineers to work in an AI-first environment—not just which tools to use, but how to rethink engineering with AI. Minimum Qualifications: BS/MS in Electrical Engineering with 8+ years IC design experience Hands-on AI tool usage (LLM assistants, coding copilots, agentic workflows, ML-based EDA) with concrete examples of productivity or design impact Experience redesigning workflows around AI—restructuring specs, reviews, or verification for AI operation; building custom prompts/agents for automation Deep understanding of high-speed IO performance, power/area optimization, and chip architecture/floor planning Experience with physical design flows, layout optimization, and parasitic extraction Preferred Qualifications: Built/deployed custom AI agents, LLM pipelines, or ML models for IC design, verification, layout, or debug; familiarity with prompt engineering, RAG, fine-tuning, or agentic frameworks Quantified productivity impact of AI inspired changes (cycle time, defects, coverage) DRAM interface experience (DDR4/5, LPDDR5/6, HBM3/4) or other high-speed standards Deep knowledge of CMOS device physics, reliability, BSIM modeling, and IO targets The US base salary range that Micron Technology estimates it could pay for this full-time position is: $176,000.00 - $298,000.00 a year Additional compensation may include benefits, bonuses and equity. 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We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits . Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. To learn about your right to work click here. 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